I knew that chip design was abstracted somehow - but I failed to understand how much. ▻http://www.reddit.com/r/AskEngineers/comments/3adekw/how_are_plans_of_huge_asics_stored_you_dont/csbnuuw explains how much. Having just read Data General’s 70’s Soul of a New Machine story and its debugging sessions wired to a gaggle of logic analyzers, this reads like science fiction !